Power optimization of Low Noise Amplifier (LNA) and DAC used in Closed Loop Deep Brain Neuro-Stimulator (CDBS) at 45nm using Cadence Virtuoso

Sufia Banu; Shweta Gupta

doi:10.53730/ijhs.v6nS3.7153

Authors

Sufia Banu Research Scholar, Department of Electronics Engineering, Jain (Deemed-to-be University), Bengaluru, India | Assistant Professor, Department of ECE, HKBK College of Engineering, Bengaluru-560045, India
Shweta Gupta Associate Professor, Department of ECE, Jain University, Bengaluru, India

Keywords:

CMOS, Deep-Brain-Stimulation (DBS, Digital-to-Analog Converters (DAC), Low-Noise Amplifier (LNA), low power

Abstract

Deep-Brain-Stimulation (DBS) is a rapidly growing area which aims to enhance the lives of patients with different types of brain disorders. In regards of implanted devices, it's perhaps one of the most active research topics. This study describes a Low-Noise-Amplifier (LNA) and Digital-to-Analog Convertor (DAC) for biopotential collection on Deep Brain Stimulation.

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